Motorola ECL
Emitter Coupled Logic

a  rant by Ralph Klimek Aug 2007

How the IT world would be very differant , if only.....

How differant the world would be, if only at some critical juncture a differant choice between competing and mostly desirable choices was made. One such critical choice was a choice that mainframe and minicomputer manufacturers had to make in the early nineteen seventies. It was which chip technology to use.  

It was a critical choice. A mainframe might use allmost half a million chip packages, and given the long lead time from design concept to showroom a correct and conservative choice was critical to commercial survival.  Cost mattered.

IBM had no such difficulty, they made their own chips and did not largely depend on commerical producers. Burroughs used their own curious and not widely copied "CTuL" logic family made for them on special order by ITT and Fairchild. Eventually they abandoned them for plain old TTL in the A series mainframes.

The others had to use commodity chips, DEC, NCR et al did not have the resources to create their own sillicon foundries. All commissioned special function chips and nearly all house coded the chips to disguise their true commerical generic part numbers to stymie competitive reverse engineers.

The choice the users of commodity chips faced was whether to use one of the many variant of TTL or to use Motorola ECL.

Motorola Emitter Coupled Logic was first released to the market in the early nineteen sixties. Their first application notes are dated 1962!  It was hardly even possible to purchase discrete silicon transistors (in Australia) until the early seventies yet here was a family of sillicon integrated logic circuits that were boasting propagation delays measured in nano-seconds in the early sixties. This is truly the stuff of conspirary theories. This was the era of discrete, slow and buggy germanium transistors, a time I recall when a transistor that could amplify at one megahertz earned the designation of "RF transistor" !  I recall saving up my pocket money in 1970 so that I could buy an AF116 whoose claim to fame was an fT of 2Mhz ! Yet Motorolas' ECL could allready do 100Mhz !  

A conspiracy theory of my very own, states, (without any proof, off course) that Motorolas' entire output of ECL vanished into the military-industrial complexes's skunk work projects and ICBM nose cones. This left the commercial world with only lousy RTL and DTL and hopelessly slow PMOS processes until some geniuses in Texas Instruments invented the TTL specification. They must have invented such a "horrible" specification to circumvent the patents that Motorola and other must have had on anything else. The TI TTL specification was only horrible in the sense that it merely underscores the positive aspects of the the ECL interface. The TTL specification was brilliant in the way that for the first time there was a sensible fan out and interconnection rule set that a child could understand. Anybody that had snapped LEGO bricks together as a child could snap TTL chips together and achieve a digital system that just plain worked. The marketing arm of TI also let out the misconception that design with ECL is "hard". This , as I shall attempt to show, is a half truth, mere market-speak.

If, as I claim, ECL was so superior, why then was it a commercial failure and neglected. (Rockefeller's Razor..."hey buster, if youre so smart how come youre not rich ?") By 1975, the TTL interface , chip sets and extentions were widely licencsed by TI and a very rich commercial offering of TTL chips and hundreds of SSI, MSI and LSI chip functions were widely available, and as I recall, were available for pocket money prices.

In contrast, in 1975 the ECL interface had not been licensed to anyone and only a small but functional library of ECL parts were available. Many SSI gates and a smattering of MSI functions. By 1980 there was offered an ECL 8 bit slice processor that should have set the minicomputer world ablaze with 100 Mip CPUs, instead minicomputer makers used heavily microprogrammed bit slice designs based on AMD's barely functional 2901 family that chugged along at a breathtaking 8Mhz to produce a machine that had maybe a mip or two. What happened ?  I really do not know the answere to this but I suspect the truth to have been a spectacular marketing failure; either that or my silly conspiracy theory is right!

Now to justify my claim that Motorolas' ECL was "inherently superior".
Speed, speed , speed and yet more speed. The propagation delay in a MECL 16 pin DIP of a simple gate was about 2ns. A typical D or MS flip-flop could toggle at above 100Mhz...without even trying. Selected ones were rated to 250Mhz , apologistically described as the high speed version! Compare and contrast this with a typcial TTL gate, propagation delay of 20 to 30ns and flip-flop max toggle rate of 30Mhz.
Every ECL gate without exception was inherently a line driver. Every ECL gate input had effectively infinite input symetrical impedance. (ok, microamps and 2 pF !) . (unlimited fan out!) The current drawn from the power supply did not change as the logic functions changed state! All ECL outputs were inherently wire OR/AND able with no speed penalty. All conductors were to be treated as if they were transmission lines. This is one area were TI's superior marketing people got them. They called this "hard to design with" because digital people are frightened of analog things like transmission lines. It actually wasnt, we shall see. It was possible to "lego brick" ECL gates together, provided you remembered to treat all nodes as a transmission lines and sheild your clock lines!  This simple principle was alien and incomprehensible to the average TTL designer of the time. The one furphy that TI marketing put out was that ECL was power hungry. This was actually true, ECL gates eat power, and everyone knows this was a Bad Thing (tm) !

Just to revise, the TTL interconnection rules, one output could drive 7 inputs. Lines had to be driven by special line driver chips. You had to draw 15mA of current out of an input to drag it low, but only microamps to drive it high! Wire OR could only be done with open collector output chip buffers/gates. Then we have to have TRISTATE buffers to have a bus ! Most of my TTL logic board is made from buffer chips (that as every Harvard MBA says, dont add value!). In practice I cannot toggle my flip flops at 30Mhz because I must now add up all the worst case propagation delays in my logic and toggle at 1 or 2 or maybe a breathtaking 5 Mhz if I got my sums right. It got even sillier. An ECL node (read transmission line) is terminated in a resistor that absorbs the unwanted energy of a signal as it bangs into the end of the line. We dont want it coming back, that could make one pulse seem like two or more. The laws of analog transmission lines still apply in the TTL world, we just try to ignore them! At the input of a TTL gate is a reverse biased diode that partially absorbs half of the unwanted energy of a signal pulse and still reflects back towards the source and anybody listening!  When a TTL gate changes state it draws a large and ugly current spike from the supply, which if not carefully decoupled will propagate to a nearby flip flop and changes its state! Thats why its hard to do high speed TTL and easy to do high speed ECL because the analog signals are handled properly.

To be fair and balanced and stuff, TTL did improve, because it had to and because the market said it "sucked".  Then we got HTTL, LSTTL, STTL and CMOS variants for special ultra low power application. The pinnacle was the FTTL seris and the bicmos variants that finally achieved the propagation delays and toggle rates that ECL had twenty years prior.

I had the oppurtunity to perform chip level maintenance on various mainframe and minicomputer systems, DEC, PYRAMID and BURROUGHS. All used mostly or in part TTL.  DEC and PYRAMID all used STTL allmost exclusiveley. The DEC VAX 780 , despite its achitectural elegance was a horrible microprogrammed kludge that despite the "wise" choice of Shottcky TTL could only do a mip. The PYRAMID also used STTL, it was a risc CPU, heavily vertically microprogrammed but it could do 3 or 4 mips. Both machines had a fundamental master clock of 32Mhz divided down to produce a multiphase 8 Mhz system clock.  The chip set in both could have been replaced with ECL equivalents without fundamentally changing the cpu architecture.  The VAX 780 could have run at 50 Mips instead of the lousy 1.0 Mip. The PYRAMID could have rattled its bones at 100 Mips, this in 1980 !
(the "mip" about 1980 was defined in terms of one mip equals whatever a DEC VAX780 could do)

Seymour Cray got it right, and got it right at the start. The CRAY 1 was made from Motorola ECL. It was power hungry and was the envy of major governments ! It ran at about 50 Mips.

Simple RISC, ECL bit sliced machines could have done 100 Mips when the state of the art was 1.0 Mips. Where would we be today?

Motorola eventually licensed ECL to anybody who wanted it. I think the only taker was NEC that made its own ECL chip set for in house consumption for their own mainframes.

You can still buy TTL chips for simple glue functions, the MSI functions have fallen by the wayside given the very low cost of high speed microcontrollers.

Now its the year 2007, you cannot buy new MECL chips, except from old stock.

From my own experience in building things with ECL, a mere technician (such as myself) can make a reliable 100Mhz ECL digital logic system, but it takes a real Electronic Engineer (tm) to make a TTL circuit that is reliable at 50Mhz.

For my hobbiest interest in ECL, I obtained all my ECL parts from discarded mainframe components. Otherwise it is not available.  Go figure.

See also, this,  CTUL was another bipolar technology of the early sixties that could have been great. It used open emitter outputs to great effect.

I have recently recieved some very interesting correspondance from  Dr J McMillan of Sheffield about the early history of ECL. Turns out, ECL was a British invention with a heritage going back to the late fifeties!  There is a British patent by Plessey for the basic ecl gate lodged in the early sixties.  The late fifeties reference points to designs for "milli-microsecond transistor current switching circuits".  I suppose I should be hopping mad at this point. The world could have had Cray class machines  in the sixties!


mod record  Fri Nov 21 13:25:24 EST 2008, email sig  postscripts and Plessey patent;
Thu Jul 15 19:16:19 EST 2010 fixed broken link