EXPERIMENT NO. 7: FIELD EFFECT TRANSISTOR

OBJECTIVE

To measure the characteristics of a junction field effect transistor (JFET) and to test a simple votage amplifier.

APPARATUS

Circuit Module No. "Exp. 7"

This circuit uses a p-channel junction field effect transistor 2N4360 for which the drain characteristics are shown below.

Note that the characteristics vary substantially with temperature and from device to device.

The circuit of Figure 1 illustrates a simple FET amplifier with dc supplies connected in the drain and the gate circuits.

Figure 1

The function of the 470 Ohm resistor is to allow the gate bias voltage V_GG to be applied to the gate of the FET without short circuiting the signal source. Other methods of biasing are possible and these can result in the elimination of the supply voltage V_GG.

Neglecting R_L, and the 100µF capacitor, we can write the equation

V_DD = R_D + V_DS or, rearranging i_D = - V_DS / R_D + V_DD / R_D

This is the equation for the dc load line which can be drawn on the drain characteristics with a slope of -1/R_D. The intercept on the i_D axis is V_DD / R_D and on the V_DS axis is V_DD.

The dc load line give the pairs of values of I_D and V_DS that can exist in the circuit. The values that actually do exist are determined by the gate to source voltage V_GS and known as the quiescent values I_D and V_DS. Varying V_GS will cause V_DS and I_D to change.

If V_GS is varied about its quiescent value, V_GS will also vary about its quiescent value V_DS. For sinusoidal voltages, the output voltage is 180° out of phase with the input voltage. When the input voltage swings to parts of the characteristics which deviate from a straight line the output will become more and more distorded.

One way of obtaining an insight into the voltage amplification process is to plot the output voltage V_DS as a function of input voltage V_GS for a fixed load resistance. Such a curve is known as a dynamic transfer characteristic. The small signal voltage gain can be estimated from the gradient of the plot of V_DS against V_GS.

Where a coupling capacitor is used at the output of an amplifier, the load on the circuit for the ac signal will be different to the load for the dc supply. The circuit in Figure 1 uses a 100µ coupling capacitor.

To analyse the circuit in this case, it is necessary to make use of the ac load line. The dc load is the reistor R_D while the ac load is R_L in parallel with R_D so that the ac load line has a slope of -1/(R_L || R_D) and must pass through the quiescent or Q-point.

Note that it is necessary to plot new transfer characteristics to estimate the small signal transfer function when an ac load is applied.

Figure 2

PRELIMINARY:

1. Taking V_GG as 1.1V in Figure 1 and using the characteristics supplied, plot
   • the dc load line
   • the ac load line
   • voltage transfer characteristics V_DS versus V_GS for the amplifier, both with and without the ac load.
2. From the transfer characteristics: calculate and plot the small signal gain as a function of the bias voltage V_GS for:
   • the dc load alone
   • the dc and ac load together.
   Assume that a singla magnitude of ±½ a volt is sufficiently small to constitute a "small signal".

1. Connect the circuit as shown in Figure 3 with R_D = 390 Ohm and R_L =

   Set the supply voltage V_DD to -15 volts and with V_GS equal to 0 volts, vary V_DS in steps down to zero volts tracing out the drain characteristics, ie. plot I_D as a function of V_DS for a fixed V_GS. Plot the characteristics as you proceed.

2. Repeat 1. above for V_GS set in turn to 0.5, 1, 1.5, 2 volts.
3. Connect the amplifier circuit shown in the Figure 1 with V_GG = 1.1 volts, R_D = 2.2 k but without the ac load resistor R_L connected. Set the frequency of the oscillator to about 1000 Hz and initially have the amplitude control turned right down.

   View the output on a CRO. Advance the amplitude control on the oscillator until a sinusoidal output signal appears. Measure the voltage gain by displaying the input and output signals on the CRO.

4. Repeat 3, with V_GG of 0.5, 1 and 2 volts.
5. Repeat 3 and 4 with an ac load of 2.2k connected.
6. Increase the ac input voltage until severe distortion starts to occur. Sketch the output waveform.

1. The report is to include:
   • graphs of the measured FET characteristic.
   • graphs of both transfer characteristics and voltage gain as a function of bias voltage for both the dc load alone and dc loads together.
   • overload waveforms.
   • a comparison of predicted and experimental results.
2. An essential feature of an amplifier is that some power gain is achieved.
   • Does this imply that a voltage gain of greater than unity is necessary ?
   • Where does the extra power come from ?

Figure 3

DRAIN CHARACTERISTICS OF P-CHANNEL FIELD EFFECT TRANSISTOR 2N4360

For assistance in connecting up your circuit for this experiment, click on bar above.